1. Field of the Invention
The present invention is directed to the manufacture of masks used in the lithographic production of integrated circuits and, in particular, to the manufacture of resolution enhancement technique (RET) enhanced masks, more particularly, to the automated and optimized conversion of IC layouts to RET mask designs.
2. Description of Related Art
As an alternative to chrome on glass (COG) masks used in the lithographic production of integrated circuits, alternating phase shifting masks (altPSMs) have been employed in order to increase the resolution of the critical active area patterns projected. Such increased resolution enables smaller line widths and tighter pitches to be exposed on the resist and consequently etched into or deposited on the wafer substrate. The critical dimension (CD) of the system is the smallest dimension that the lithographic system can create with adequate dimensional control on the resist layer by normal techniques, and altPSMs permit sub-CD widths to be exposed and created on the wafer. This is done by manipulating the electric field vector or phase of the energy beam, e.g., visible or ultraviolet light, used in the lithographic process. This phase variation is achieved in PSMs by modifying the length that a light beam travels through the mask material. By recessing the mask to an appropriate depth, light traversing the thinner portion of the mask and light traversing the thicker portion of the masks will be 180° out of phase, that is, their electric field vector will be of equal magnitude, but point in exactly the opposite direction, so that any interaction between these light beams results in perfect cancellation. The benefit of using altPSM to image narrow lines with extremely tight dimensional control has been extensively documented.
One of the major challenges in generating an altPSM layout is to create manufacturable and lithographically viable phase shapes without introducing undue layout conflicts, and without introducing optical proximity errors. Recently, U.S. patent application Ser. No. 10/707,962 has disclosed a globally oriented approach to the design of altPSM layouts. In this approach phase legal and manufacturable layouts are achieved essentially by filling the entire background of the layout pattern with phase shapes, so that the designed phase shapes extend far beyond the primary layout of the circuit and CD features. Details of the phase shape topologies are dictated by the primary layout rather than the details of the altPSM design, so that, for example, a space in the original layout turns into a phase width. While these global approaches to altPSM design avoid costly and often error prone iterative phase legalization, they do not always present the best altPSM design for optical proximity correction (OPC). Extraneous phase shapes employed in the global PSM design approach add to the OPC complexity and may result in unfavorable tradeoffs with critical phase edges that directly impact the patterning of primary layout shapes.
While eliminating many of the phase shapes generated in the global PSM design approaches and focusing on localized PSM solutions generally improves the OPC performance, committing the layout to a localized altPSM design solution brings back all the phase legalization challenges originally avoided by the global PSM design.